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Introduce code from Rust monorepo. This is a mess

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Brandon Thomas
2022-02-28 05:43:54 -05:00
parent 921fb49f9a
commit ba326bfcfd
1058 changed files with 192192 additions and 0 deletions
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tts/NeMo/docs/source/asr/data/asr_results.csv
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Model Name,Model Base Class,Model Card
QuartzNet15x5Base-En,EncDecCTCModel,"https://ngc.nvidia.com/catalog/models/nvidia:nemospeechmodels"
stt_en_jasper10x5dr,EncDecCTCModel,"https://ngc.nvidia.com/catalog/models/nvidia:nemo:stt_en_jasper10x5dr"
stt_en_citrinet_256,EncDecCTCBPEModel,"https://ngc.nvidia.com/catalog/models/nvidia:nemo:stt_en_citrinet_256"
stt_en_citrinet_512,EncDecCTCBPEModel,"https://ngc.nvidia.com/catalog/models/nvidia:nemo:stt_en_citrinet_512"
stt_en_citrinet_1024,EncDecCTCBPEModel,"https://ngc.nvidia.com/catalog/models/nvidia:nemo:stt_en_citrinet_1024"
stt_ca_quartznet15x5,EncDecCTCModel,"https://ngc.nvidia.com/catalog/models/nvidia:nemo:stt_ca_quartznet15x5"
stt_it_quartznet15x5,EncDecCTCModel,"https://ngc.nvidia.com/catalog/models/nvidia:nemo:stt_it_quartznet15x5"
stt_fr_quartznet15x5,EncDecCTCModel,"https://ngc.nvidia.com/catalog/models/nvidia:nemo:stt_fr_quartznet15x5"
stt_es_quartznet15x5,EncDecCTCModel,"https://ngc.nvidia.com/catalog/models/nvidia:nemo:stt_es_quartznet15x5"
stt_de_quartznet15x5,EncDecCTCModel,"https://ngc.nvidia.com/catalog/models/nvidia:nemo:stt_de_quartznet15x5"
stt_pl_quartznet15x5,EncDecCTCModel,"https://ngc.nvidia.com/catalog/models/nvidia:nemo:stt_pl_quartznet15x5"
stt_ru_quartznet15x5,EncDecCTCModel,"https://ngc.nvidia.com/catalog/models/nvidia:nemo:stt_ru_quartznet15x5"
stt_zh_quartznet15x5,EncDecCTCModel,"https://ngc.nvidia.com/catalog/models/nvidia:nemo:stt_zh_quartznet15x5"
stt_zh_citrinet_512,EncDecCTCBPEModel,"https://ngc.nvidia.com/catalog/models/nvidia:nemo:stt_zh_citrinet_512"
stt_en_conformer_ctc_small,EncDecCTCBPEModel,"https://ngc.nvidia.com/catalog/models/nvidia:nemo:stt_en_conformer_ctc_small"
stt_en_conformer_ctc_medium,EncDecCTCBPEModel,"https://ngc.nvidia.com/catalog/models/nvidia:nemo:stt_en_conformer_ctc_medium"
stt_en_conformer_ctc_large,EncDecCTCBPEModel,"https://ngc.nvidia.com/catalog/models/nvidia:nemo:stt_en_conformer_ctc_large"
stt_en_conformer_ctc_small_ls,EncDecCTCBPEModel,"https://ngc.nvidia.com/catalog/models/nvidia:nemo:stt_en_conformer_ctc_small_ls"
stt_en_conformer_ctc_medium_ls,EncDecCTCBPEModel,"https://ngc.nvidia.com/catalog/models/nvidia:nemo:stt_en_conformer_ctc_medium_ls"
stt_en_conformer_ctc_large_ls,EncDecCTCBPEModel,"https://ngc.nvidia.com/catalog/models/nvidia:nemo:stt_en_conformer_ctc_large_ls"
1 Model Name Model Base Class Model Card
2 QuartzNet15x5Base-En EncDecCTCModel https://ngc.nvidia.com/catalog/models/nvidia:nemospeechmodels
3 stt_en_jasper10x5dr EncDecCTCModel https://ngc.nvidia.com/catalog/models/nvidia:nemo:stt_en_jasper10x5dr
4 stt_en_citrinet_256 EncDecCTCBPEModel https://ngc.nvidia.com/catalog/models/nvidia:nemo:stt_en_citrinet_256
5 stt_en_citrinet_512 EncDecCTCBPEModel https://ngc.nvidia.com/catalog/models/nvidia:nemo:stt_en_citrinet_512
6 stt_en_citrinet_1024 EncDecCTCBPEModel https://ngc.nvidia.com/catalog/models/nvidia:nemo:stt_en_citrinet_1024
7 stt_ca_quartznet15x5 EncDecCTCModel https://ngc.nvidia.com/catalog/models/nvidia:nemo:stt_ca_quartznet15x5
8 stt_it_quartznet15x5 EncDecCTCModel https://ngc.nvidia.com/catalog/models/nvidia:nemo:stt_it_quartznet15x5
9 stt_fr_quartznet15x5 EncDecCTCModel https://ngc.nvidia.com/catalog/models/nvidia:nemo:stt_fr_quartznet15x5
10 stt_es_quartznet15x5 EncDecCTCModel https://ngc.nvidia.com/catalog/models/nvidia:nemo:stt_es_quartznet15x5
11 stt_de_quartznet15x5 EncDecCTCModel https://ngc.nvidia.com/catalog/models/nvidia:nemo:stt_de_quartznet15x5
12 stt_pl_quartznet15x5 EncDecCTCModel https://ngc.nvidia.com/catalog/models/nvidia:nemo:stt_pl_quartznet15x5
13 stt_ru_quartznet15x5 EncDecCTCModel https://ngc.nvidia.com/catalog/models/nvidia:nemo:stt_ru_quartznet15x5
14 stt_zh_quartznet15x5 EncDecCTCModel https://ngc.nvidia.com/catalog/models/nvidia:nemo:stt_zh_quartznet15x5
15 stt_zh_citrinet_512 EncDecCTCBPEModel https://ngc.nvidia.com/catalog/models/nvidia:nemo:stt_zh_citrinet_512
16 stt_en_conformer_ctc_small EncDecCTCBPEModel https://ngc.nvidia.com/catalog/models/nvidia:nemo:stt_en_conformer_ctc_small
17 stt_en_conformer_ctc_medium EncDecCTCBPEModel https://ngc.nvidia.com/catalog/models/nvidia:nemo:stt_en_conformer_ctc_medium
18 stt_en_conformer_ctc_large EncDecCTCBPEModel https://ngc.nvidia.com/catalog/models/nvidia:nemo:stt_en_conformer_ctc_large
19 stt_en_conformer_ctc_small_ls EncDecCTCBPEModel https://ngc.nvidia.com/catalog/models/nvidia:nemo:stt_en_conformer_ctc_small_ls
20 stt_en_conformer_ctc_medium_ls EncDecCTCBPEModel https://ngc.nvidia.com/catalog/models/nvidia:nemo:stt_en_conformer_ctc_medium_ls
21 stt_en_conformer_ctc_large_ls EncDecCTCBPEModel https://ngc.nvidia.com/catalog/models/nvidia:nemo:stt_en_conformer_ctc_large_ls
tts/NeMo/docs/source/asr/data/asrlm_results.csv
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Model Name,Model Base Class,Model Card
asrlm_en_transformer_large_ls,TransformerLMModel,"https://ngc.nvidia.com/catalog/models/nvidia:nemo:asrlm_en_transformer_large_ls"
1 Model Name Model Base Class Model Card
2 asrlm_en_transformer_large_ls TransformerLMModel https://ngc.nvidia.com/catalog/models/nvidia:nemo:asrlm_en_transformer_large_ls
tts/NeMo/docs/source/asr/data/benchmark_ca.csv
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Model,Model Base Class,Model Card
stt_ca_quartznet15x5,EncDecCTCModel,"https://ngc.nvidia.com/catalog/models/nvidia:nemo:stt_ca_quartznet15x5"
1 Model Model Base Class Model Card
2 stt_ca_quartznet15x5 EncDecCTCModel https://ngc.nvidia.com/catalog/models/nvidia:nemo:stt_ca_quartznet15x5
tts/NeMo/docs/source/asr/data/benchmark_de.csv
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Model,Model Base Class,Model Card
stt_de_quartznet15x5,EncDecCTCModel,"https://ngc.nvidia.com/catalog/models/nvidia:nemo:stt_de_quartznet15x5"
1 Model Model Base Class Model Card
2 stt_de_quartznet15x5 EncDecCTCModel https://ngc.nvidia.com/catalog/models/nvidia:nemo:stt_de_quartznet15x5
tts/NeMo/docs/source/asr/data/benchmark_en.csv
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Model Name,Model Base Class,Model Card
QuartzNet15x5Base-En,EncDecCTCModel,"https://ngc.nvidia.com/catalog/models/nvidia:nemospeechmodels"
stt_zh_quartznet15x5,EncDecCTCModel,"https://ngc.nvidia.com/catalog/models/nvidia:nemo:stt_zh_quartznet15x5"
stt_en_jasper10x5dr,EncDecCTCModel,"https://ngc.nvidia.com/catalog/models/nvidia:nemo:stt_en_jasper10x5dr"
stt_en_citrinet_256,EncDecCTCBPEModel,"https://ngc.nvidia.com/catalog/models/nvidia:nemo:stt_en_citrinet_256"
stt_en_citrinet_512,EncDecCTCBPEModel,"https://ngc.nvidia.com/catalog/models/nvidia:nemo:stt_en_citrinet_512"
stt_en_citrinet_1024,EncDecCTCBPEModel,"https://ngc.nvidia.com/catalog/models/nvidia:nemo:stt_en_citrinet_1024"
stt_zh_citrinet_512,EncDecCTCBPEModel,"https://ngc.nvidia.com/catalog/models/nvidia:nemo:stt_zh_citrinet_512"
stt_en_conformer_ctc_small,EncDecCTCBPEModel,"https://ngc.nvidia.com/catalog/models/nvidia:nemo:stt_en_conformer_ctc_small"
stt_en_conformer_ctc_medium,EncDecCTCBPEModel,"https://ngc.nvidia.com/catalog/models/nvidia:nemo:stt_en_conformer_ctc_medium"
stt_en_conformer_ctc_large,EncDecCTCBPEModel,"https://ngc.nvidia.com/catalog/models/nvidia:nemo:stt_en_conformer_ctc_large"
stt_en_conformer_ctc_small_ls,EncDecCTCBPEModel,"https://ngc.nvidia.com/catalog/models/nvidia:nemo:stt_en_conformer_ctc_small_ls"
stt_en_conformer_ctc_medium_ls,EncDecCTCBPEModel,"https://ngc.nvidia.com/catalog/models/nvidia:nemo:stt_en_conformer_ctc_medium_ls"
stt_en_conformer_ctc_large_ls,EncDecCTCBPEModel,"https://ngc.nvidia.com/catalog/models/nvidia:nemo:stt_en_conformer_ctc_large_ls"
1 Model Name Model Base Class Model Card
2 QuartzNet15x5Base-En EncDecCTCModel https://ngc.nvidia.com/catalog/models/nvidia:nemospeechmodels
3 stt_zh_quartznet15x5 EncDecCTCModel https://ngc.nvidia.com/catalog/models/nvidia:nemo:stt_zh_quartznet15x5
4 stt_en_jasper10x5dr EncDecCTCModel https://ngc.nvidia.com/catalog/models/nvidia:nemo:stt_en_jasper10x5dr
5 stt_en_citrinet_256 EncDecCTCBPEModel https://ngc.nvidia.com/catalog/models/nvidia:nemo:stt_en_citrinet_256
6 stt_en_citrinet_512 EncDecCTCBPEModel https://ngc.nvidia.com/catalog/models/nvidia:nemo:stt_en_citrinet_512
7 stt_en_citrinet_1024 EncDecCTCBPEModel https://ngc.nvidia.com/catalog/models/nvidia:nemo:stt_en_citrinet_1024
8 stt_zh_citrinet_512 EncDecCTCBPEModel https://ngc.nvidia.com/catalog/models/nvidia:nemo:stt_zh_citrinet_512
9 stt_en_conformer_ctc_small EncDecCTCBPEModel https://ngc.nvidia.com/catalog/models/nvidia:nemo:stt_en_conformer_ctc_small
10 stt_en_conformer_ctc_medium EncDecCTCBPEModel https://ngc.nvidia.com/catalog/models/nvidia:nemo:stt_en_conformer_ctc_medium
11 stt_en_conformer_ctc_large EncDecCTCBPEModel https://ngc.nvidia.com/catalog/models/nvidia:nemo:stt_en_conformer_ctc_large
12 stt_en_conformer_ctc_small_ls EncDecCTCBPEModel https://ngc.nvidia.com/catalog/models/nvidia:nemo:stt_en_conformer_ctc_small_ls
13 stt_en_conformer_ctc_medium_ls EncDecCTCBPEModel https://ngc.nvidia.com/catalog/models/nvidia:nemo:stt_en_conformer_ctc_medium_ls
14 stt_en_conformer_ctc_large_ls EncDecCTCBPEModel https://ngc.nvidia.com/catalog/models/nvidia:nemo:stt_en_conformer_ctc_large_ls
tts/NeMo/docs/source/asr/data/benchmark_es.csv
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Model,Model Base Class,Model Card
stt_es_quartznet15x5,EncDecCTCModel,"https://ngc.nvidia.com/catalog/models/nvidia:nemo:stt_es_quartznet15x5"
1 Model Model Base Class Model Card
2 stt_es_quartznet15x5 EncDecCTCModel https://ngc.nvidia.com/catalog/models/nvidia:nemo:stt_es_quartznet15x5
tts/NeMo/docs/source/asr/data/benchmark_fr.csv
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Model,Model Base Class,Model Card
stt_fr_quartznet15x5,EncDecCTCModel,"https://ngc.nvidia.com/catalog/models/nvidia:nemo:stt_fr_quartznet15x5"
1 Model Model Base Class Model Card
2 stt_fr_quartznet15x5 EncDecCTCModel https://ngc.nvidia.com/catalog/models/nvidia:nemo:stt_fr_quartznet15x5
tts/NeMo/docs/source/asr/data/benchmark_it.csv
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Model,Model Base Class,Model Card
stt_it_quartznet15x5,EncDecCTCModel,"https://ngc.nvidia.com/catalog/models/nvidia:nemo:stt_it_quartznet15x5"
1 Model Model Base Class Model Card
2 stt_it_quartznet15x5 EncDecCTCModel https://ngc.nvidia.com/catalog/models/nvidia:nemo:stt_it_quartznet15x5
tts/NeMo/docs/source/asr/data/benchmark_pl.csv
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Model,Model Base Class,Model Card
stt_pl_quartznet15x5,EncDecCTCModel,"https://ngc.nvidia.com/catalog/models/nvidia:nemo:stt_pl_quartznet15x5"
1 Model Model Base Class Model Card
2 stt_pl_quartznet15x5 EncDecCTCModel https://ngc.nvidia.com/catalog/models/nvidia:nemo:stt_pl_quartznet15x5
tts/NeMo/docs/source/asr/data/benchmark_ru.csv
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Model,Model Base Class,Model Card
stt_ru_quartznet15x5,EncDecCTCModel,"https://ngc.nvidia.com/catalog/models/nvidia:nemo:stt_ru_quartznet15x5"
1 Model Model Base Class Model Card
2 stt_ru_quartznet15x5 EncDecCTCModel https://ngc.nvidia.com/catalog/models/nvidia:nemo:stt_ru_quartznet15x5
tts/NeMo/docs/source/asr/data/benchmark_zh.csv
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Model,Model Base Class,Model Card
stt_zh_quartznet15x5,EncDecCTCModel,"https://ngc.nvidia.com/catalog/models/nvidia:nemo:stt_zh_quartznet15x5"
stt_zh_citrinet_512,EncDecCTCBPEModel,"https://ngc.nvidia.com/catalog/models/nvidia:nemo:stt_zh_citrinet_512"
1 Model Model Base Class Model Card
2 stt_zh_quartznet15x5 EncDecCTCModel https://ngc.nvidia.com/catalog/models/nvidia:nemo:stt_zh_quartznet15x5
3 stt_zh_citrinet_512 EncDecCTCBPEModel https://ngc.nvidia.com/catalog/models/nvidia:nemo:stt_zh_citrinet_512